The present invention relates to an insulated gate bipolar transistor (hereinafter referred to as IGBT) having a so-called lateral structure in which an emitter side portion and a collector side portion are formed in a semiconductor region such as an epitaxial layer on the surface side of a chip or wafer.
As well known, in its function, the IGBT is a lo combination of a field effect transistor provided with an insulated gate and a bipolar transistor. Specifically, the IGBT has both features of a high input impedance of the field effect transistor (FET) and a low output impedance of the bipolar transistor, and is suitable for a device for a high voltage and a large current. Therefore, the IGBT has been widely used as a discrete power device for driving several kinds of loads. Further, in recent years, there is a remarkable tendency that the IGBT is incorporated in an integrated circuit together with related circuits to rationalize the entire load driving apparatus and also high integration technology is used to miniaturize the pattern for forming the IGBT thereby to improve the high frequency performance. In this case, as a matter of course, it is advantageous to form the IGBT only from the surface of a wafer for an integrated circuit. For this reason, the IGBT having the above lateral structure is adopted. Now referring to FIG. 5, such a conventional lateral IGBT will be described briefly.
As in the case of an ordinary integrated circuit, a semiconductor base 10 which is a wafer or chip whose section is shown in FIG. 5, is composed of e.g., a p-type semiconductor substrate 11 and an n-type epitaxial layer as a semiconductor region 12 grown on the semiconductor substrate. IGBTs are formed by repeating the minute unit structure shown by "U" in the drawing plural times symmetrically in a horizontal direction in the semiconductor region 12. The left side of the drawing indicates an emitter side portion 20 and the right side portion indicates a collector portion 30. In the emitter side portion 20, from the surface of the semiconductor region 12, a p-type base layer 22, a p-type contact layer 23 inside it and n-type source regions 24 which partially overlap with the base region 22 and contact layer 23 are successively diffused, and a gate 21 is disposed through a very thin gate oxide film 21a on the surface of the base layer 22 which is located between the semiconductor region 12 and source layer 24. Further, an electrode film 41 is disposed so as to short-circuit the contact layer 23 with the source layers 24 on the surface of the substrate. An emitter terminal E for the IGBT is drawn from the electrode film 41, and a gate terminal G is drawn from the portion other than the shown section of the gate 21.
The collector side portion 30 is composed of a p-type collector layer 33 diffused from the surface of the semiconductor region 12 spaced apart from the emitter side portion 20 by a predetermined distance, an electrode film 42 connected to the collector layer 33 and a collector terminal C drawn from the film 42. In this example, an n-type buffer layer 13 is formed so as to surround the collector layer 33 externally. Plural unit structures U as shown in FIG. 5 are formed and emitter side portion 20 and collector side portion 30 are connected in parallel to form the IGBT which is used with a positive voltage applied to the collector terminal C.
In this example, when a positive control voltage relative to the emitter terminal E is applied to the gate terminal G of the IGBT, an n-type channel is formed in the surface portion of the base layer 22 below the gate 21. Through the n-type channel, majority carriers which are electrons are injected from the source layer 24 into the semiconductor region 12. Thus, a p-n-p type bipolar transistor composed of the p-type collector layer 33, n-type semiconductor region 12 and the p-type base layer 22 or contact layer 23 receives the majority carriers as a base current so that it turns on so as to be electrically conductive between the emitter terminal E and collector terminal C. Further, when the current due to the majority carriers flows into the collector layer 33 owing to the turn-on of the p-n-p type transistor, the minority carriers which are holes in this example are injected into the semiconductor layer 12 through the buffer layer 13 from the collector layer 33. Their mutual action with the majority carriers generates so-called conductivity modulation action in the semiconductor region 12. Thus, the conductivity of the semiconductor region 12 is enhanced thereby to increase the current capacity of the IGBT.
When the control voltage for the gate terminal G is cut off, the channel below the gate 21 disappears. Therefore, the injection of the majority carriers into the semiconductor region 12 is stopped so that the IGBT turns off. During the "off" operation, the majority carriers remaining in the semiconductor region 12 are pulled out into the collector terminal C through the collector layer 33 and the minority carriers remaining in the semiconductor region 12 are pulled out into the emitter terminal E through the base layer 22 and contact layer 23. Thus, as these carriers are swept out from the semiconductor region 12, a depletion layer is enlarged within the semiconductor region 12. This results in the off state with a predetermined withstand voltage in accordance with the distance between the emitter side portion 20 and collector side portion 30.
The time required for such an "off" operation is substantially determined by the time required to sweep the holes or minority carriers with a lower mobility. When a large amount of minority carriers are injected into the semiconductor region 12 while the majority carriers are extracted, the "off" operation is prolonged. In order to obviate such an inconvenience, as described above, the buffer layer 13 having the opposite n-type conductivity type and surrounding the collector layer 33 is provided to restrain the injection of minority carriers thereby to shorten the "off" operation.
Although the IGBT described above has advantages of a high input impedance equivalent to the field effect transistor and a low output impedance or "on" voltage substantially equivalent to a bipolar transistor, it is difficult to increase the "off" operation speed. Therefore, the above IGBT is not suitable for application to a circuit operating at a high frequency. The above buffer layer 13 can increase the "off" operation speed slightly. However, the increase of such an effect decreases the number of minority carriers injected in the semiconductor region 12 when the IGBT is "on" so that the conductivity modulation action can be attenuated. Thus, the unique feature of the IGBT having a low "on" voltage will be lost.
In order to obviate this difficulty, in the IGBT for a high frequency, a process has been frequently adopted in which the trap level having the same function as that of lifetime killers is formed in the semiconductor region 12 by the means such as electron beam radiation so that the minority carriers are absorbed by recombination. But, since this operation acts not only during the "off" operation but also during the "on" state, the "on" voltage is necessarily increased more or less. In addition, where the IGBT is formed into an integrated circuit device, the entire chip will be subjected to electron beam radiation. As a result, the threshold voltage of the relevant circuits will be reduced disadvantageously.
A so-called "collector-shorted structure" has been proposed as powerful means for solving the above problem. Now referring to FIG. 6, this collector-shorted structure will be explained. As shown in FIG. 6, a p-type collector layer 33 and an n-type collector short layer 36 whose periphery is encircled by the collector layer are diffused into the collector side portion 30, and a collector terminal C is formed on an electrode film 42 which short-circuits both layers 33 and 36. The emitter side portion 20 has the same structure as shown in FIG. 5. When the IGBT is in an "on" state, a part of majority carriers injected from the emitter side portion 20 into the semiconductor region 12 flows into the collector short layer 36 through a portion below the collector layer 33 and the remaining part of the majority carriers flows into the collector layer 33. Then, the minority carriers flow from the p-type collector layer 33 into the semiconductor region 12.
When the IGBT is in the off operation, minority carriers are hard to be generated against the majority carriers flowing into .the collector short layer 36. Thus, the collector-shorted structure can reduce the number of minority carriers to be swept from the semiconductor region 12 thereby to shorten the "off" operation time. In the case of the lateral IGBT, however, the majority carriers flowing into the collector short layer 36 pass the lower side of the collector layer 33. Therefore, a remarkable amount of minority carriers are likely to be injected from the collector layer 33 into the semiconductor region 12. As a result, the "off" operation time in the lateral structure cannot be shorten as that in the vertical structure.